NSN 5962-01-361-1572
Part Details | DIGITAL MICROCIRCUIT
5962-01-361-1572 A microcircuit specifically designed to generate, modify, or process electrical signals which operate with two distinct or binary states. These states are commonly referred to as on and off, true and false, high and low, or "1" and "0".
Alternate Parts: 77A112512P1, 77A112512P001, 77A11251P001, 5962-01-361-1572, 01-361-1572, 5962013611572, 013611572
| Supply Group (FSG) | NSN Assigned | NIIN | Item Name Code (INC) |
|---|---|---|---|
| 59 | JUL 11, 1992 | 01-361-1572 | 31779 ( MICROCIRCUIT, DIGITAL ) |
REFERENCE DRAWINGS & PICTURES
Cross Reference | NSN 5962-01-361-1572
| Part Number | Cage Code | Manufacturer |
|---|---|---|
| 77A112512P1 | 0K9W2 | EPI TECHNOLOGIES INCDBA EPI INC |
| 77A112512P001 | 03538 | LOCKHEED MARTIN CORPORATIONDIV RMS |
| 77A11251P001 | 03538 | LOCKHEED MARTIN CORPORATIONDIV RMS |
Technical Data | NSN 5962-01-361-1572
| Characteristic | Specifications |
|---|---|
| OUTPUT LOGIC FORM | TRANSISTOR-TRANSISTOR LOGIC |
| DESIGN FUNCTION AND QUANTITY | 2 FLIP-FLOP, D-TYPE, MASTER SLAVE |
| INPUT CIRCUIT PATTERN | 9 INPUT |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | ACV0.0 VOLTS MINIMUM AND ACV8.0 VOLTS MAXIMUM |
| OPERATING TEMP RANGE | -55.0 TO +125.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 20 LEADLESS |
| TERMINAL SURFACE TREATMENT | SOLDER |
| INCLOSURE CONFIGURATION | LEADLESS FLAT PACK |
| INCLOSURE MATERIAL | CERAMIC |
| CASE OUTLINE SOURCE AND DESIGNATOR | C-2 MIL-M-38510 |
| BODY LENGTH | 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM |
| BODY HEIGHT | 0.060 INCHES MINIMUM AND 0.100 INCHES MAXIMUM |
| BODY WIDTH | 0.342 INCHES MINIMUM AND 0.358 INCHES MAXIMUM |
| MAXIMUM POWER DISSIPATION RATING | 370.0 MILLIWATTS |
| STORAGE TEMP RANGE | -65.0 TO +165.0 DEG CELSIUS |
| FEATURES PROVIDED | ELECTROSTATIC SENSITIVE AND MONOLITHIC |
| TEST DATA DOCUMENT | 96906-MIL-STD-883 STANDARD (INCLUDES INDUSTRY OR ASSOCIATION STANDARDS, INDIVIDUAL MANUFACTUREER STANDARDS, ETC.). |