NSN 5962-01-564-4652
Part Details | DIGITAL MICROCIRCUIT
5962-01-564-4652 A microcircuit specifically designed to generate, modify, or process electrical signals which operate with two distinct or binary states. These states are commonly referred to as on and off, true and false, high and low, or "1" and "0".
Alternate Parts: MM74HCT244N, 5962-01-564-4652, 01-564-4652, 5962015644652, 015644652
| Supply Group (FSG) | NSN Assigned | NIIN | Item Name Code (INC) |
|---|---|---|---|
| 59 | JUN 17, 2008 | 01-564-4652 | 31779 ( MICROCIRCUIT, DIGITAL ) |
REFERENCE DRAWINGS & PICTURES
Cross Reference | NSN 5962-01-564-4652
| Part Number | Cage Code | Manufacturer |
|---|---|---|
| MM74HCT244N | 07263 | FAIRCHILD SEMICONDUCTOR CORP |
Technical Data | NSN 5962-01-564-4652
| Characteristic | Specifications |
|---|---|
| OUTPUT LOGIC FORM | COMPLEMENTARY-METAL OXIDE-SEMICONDUCTOR LOGIC |
| DESIGN FUNCTION AND QUANTITY | 1 BUFFER, TRI-STATE |
| VOLTAGE RATING AND TYPE PER CHARACTERISTIC | ADN4.5 VOLTS MINIMUM AND ADN5.5 VOLTS MAXIMUM |
| CURRENT RATING PER CHARACTERISTIC | CKCHU1.00 MICROAMPERES |
| CAPITANCE RATING PER CHARACTERISTIC | BPFC15.00 INPUT AND FPFC20.00 OUTPUT |
| MEMORY CAPACITY | ANY ACCEPTABLE |
| OPERATING TEMP RANGE | -40.0 TO +85.0 DEG CELSIUS |
| TERMINAL TYPE AND QUANTITY | 20 PIN |
| INCLOSURE CONFIGURATION | DUAL-IN-LINE |
| INCLOSURE MATERIAL | PLASTIC |
| CASE OUTLINE SOURCE AND DESIGNATOR | MS-001.0. INCH WIDE JOINT ELECTRON DEVICE ENGINEERING COUNCIL |
| PART NAME ASSIGNED BY CONTROLLING AGENCY | INAVY: MICROCIRCUIT; DWG: NON-INVERTING OCTAL 3-STATE BUFFER |
| BODY LENGTH | 1.013 INCHES MINIMUM AND 1.040 INCHES MAXIMUM |
| BODY HEIGHT | 0.130 INCHES NOMINAL |
| BODY WIDTH | 0.300 INCHES MINIMUM AND 0.320 INCHES MAXIMUM |
| SPECIAL FEATURES | NON-INVERTING BUFFER; HAS 2 ACTIVE LOW ENABLES, EACH ENABLE INDEPENDENTLY CONTROLS 4 BUFFERS |
| END ITEM IDENTIFICATION | MARK III HELICOPTERS (SH-60B); PANEL ID CASS OTPS; CCA, AGE (A1); MH-605/S CASS OTPS: PANEL ID PCCN: P2J990 |
| SUPPLEMENTARY FEATURES | DESIGNED TO INTERFACE BETWEEN TTL AND NMOS COMP0NENTS AND STANDARD CMOS DEVICES; ALSO AS PLUG-IN REPLACEMENTS FOR LS-TTL DEVICES; CAN BE USED TO REDUCE POWER CONSUMPTION IN EXISTING DESIGNS |